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ARM ASM: Atomic Compare-and-Swap (CAS)

ASM ARM

Goal -- WPM

Ready
Exercise Algorithm Area
1.global compare_and_swap
2
3@ compare_and_swap: Atomically compares a memory location with an expected value
4@ and, if they match, swaps it with a new value.
5@ R0: memory address of the value
6@ R1: expected current value
7@ R2: new value to swap in
8@ R0: 0 if swap succeeded, 1 if failed (value was not as expected)
9@ R3: holds the actual value read from memory (for debugging/info)
10compare_and_swap:
11PUSH {R4, R5, R7, LR} @ Save registers and LR
12MOV R7, SP @ Set up frame pointer
13SUB SP, SP, #8 @ Allocate space for local variables (if any)
14
15MOV R4, R0 @ R4 = address
16MOV R5, R1 @ R5 = expected value
17MOV R7, R2 @ R7 = new value (using R7 as temporary for new value)
18
19.cas_loop:
20LDREX R3, [R4] @ Load exclusive: R3 = *address
21@ Sets exclusive monitor for address R4
22
23CMP R3, R5 @ Compare loaded value (R3) with expected value (R5)
24BNE .cas_fail @ If not equal, the swap will fail
25
26STREX R0, R7, [R4] @ Store exclusive: R0 = 0 if success, 1 if fail
27@ Tries to store R7 (new value) to address R4
28@ Clears exclusive monitor
29
30CMP R0, #0 @ Check the return value of STREX
31BNE .cas_loop @ If STREX failed (returned 1), retry the whole operation
32
33@ Swap succeeded
34MOV R0, #0 @ Set return value to 0 (success)
35B .cas_done @ Branch to completion
36
37.cas_fail:
38@ Swap failed because expected value did not match
39MOV R0, #1 @ Set return value to 1 (failure)
40@ R3 already holds the actual value read from memory
41@ We could optionally load the actual value again if needed, but R3 has it.
42B .cas_done @ Branch to completion
43
44.cas_done:
45ADD SP, SP, #8 @ Deallocate stack space
46POP {R4, R5, R7, LR} @ Restore registers and LR
47BX LR @ Return
Algorithm description viewbox

ARM ASM: Atomic Compare-and-Swap (CAS)

Algorithm description:

This ARM assembly function `compare_and_swap` (CAS) is a fundamental atomic operation for concurrent programming. It attempts to update a memory location only if its current value matches an expected value. This is crucial for implementing lock-free data structures and synchronization primitives, preventing race conditions where multiple threads might try to modify the same data simultaneously. The atomicity ensures that the read-compare-write sequence happens as a single, indivisible operation.

Algorithm explanation:

The `compare_and_swap` function uses ARM's Load-Exclusive (LDREX) and Store-Exclusive (STREX) instructions to achieve atomicity. It takes the memory address, expected value, and new value as input. It first loads the current value from the address using `LDREX`. If this loaded value matches the expected value, it attempts to store the new value using `STREX`. `STREX` returns 0 if the store was successful (meaning no other processor modified the memory location between `LDREX` and `STREX`) and 1 otherwise. If `STREX` fails, the entire operation is retried from the `LDREX` instruction. If `LDREX` reads a value different from the expected value, the swap fails immediately. The function returns 0 for success and 1 for failure. This mechanism guarantees that the operation is atomic, meaning it's indivisible from the perspective of other processors or threads. Time complexity is O(1) on average, but can be higher in highly contended scenarios due to retries. Space complexity is O(1) for register usage and stack.

Pseudocode:

FUNCTION compare_and_swap(address, expected_value, new_value):
  LOOP:
    LOAD current_value FROM address (exclusive)
    IF current_value IS NOT expected_value THEN
      RETURN failure (1)
    END IF
    TRY TO STORE new_value TO address (exclusive)
    IF STORE FAILED THEN
      GOTO LOOP
    END IF
    RETURN success (0)
  END LOOP
END FUNCTION